Digital phase-locked loop operating mode control method and devi

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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328155, 331 25, 331DIG2, H03L 7095

Patent

active

052686531

ABSTRACT:
A method for controlling the operating mode of a digital phase-locked loop including a counter controlling incrementing or decrementing of the frequency of a digital clock signal internal to the loop is such that, the input signal of the loop being present intermittently, with random phase from one appearance to the next, the control method comprises, in this order, the following steps:

REFERENCES:
patent: 3989931 (1976-11-01), Phillips
patent: 4316152 (1982-02-01), Meyer
patent: 4587496 (1986-05-01), Wolaver
patent: 4763342 (1988-08-01), Ambrosio et al.
Electronic Components and Applications, vol. 9, No. 2, Dec. 31, 1989, Eindhoven, Netherlands, pp. 66-89; W. Rosink: "All Digital Phase-Locked Loops Using The 74HC/HCT297".

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