Digital phase-locked loop filter

Details Digital phase-locked loop filter Digital phase-locked loop filter

1977-01-24

1978-01-03

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

328133, 328155, 329104, 331 17, 331 25, H03B 304

Patent

active

040669785

ABSTRACT:
A phase processing system which includes at least one digital phase-locked loop wherein the phase of the input signal to the loop is compared with the phase of the loop output signal to produce a pulse-width modulated phase error signal. The error signal is digitally integrated, as by a counting means which cyclically counts the pulse widths thereof and provides a first control signal when the count reaches a first value and a second control signal when the count reaches a second value. The control signals are used to control the pulse rate of a clock signal to produce an intermediate clock signal such that when the first control signal is present a pulse is added thereto and when the second control signal is present a pulse is deleted therefrom. The intermediate clock signal is then fed to a feedback divider counting means which provides the loop output signal.

REFERENCES:
patent: 3544717 (1970-12-01), Smith
patent: 3600699 (1971-08-01), Orenberg
patent: 3781695 (1973-12-01), Jackson
patent: 3883817 (1975-05-01), Cliff

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