Digital phase-locked loop clock extractor for bipolar signals

Pulse or digital communications – Repeaters – Testing

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Details

375120, 328155, H04L 2548, H04L 702

Patent

active

048521248

ABSTRACT:
A clock extractor circuit comprising a frequency divider which derives the clock signal from a signal having a frequency which is a multiple of the frequency of a received bipolar signal input. A correction logic circuit in the frequency divider compares the logic state of the frequency divider with a transition detection signal derived by sampling the bipolar signal at the multiple frequency and, on the basis of the phase error detected, commands a phase correction of the clock signal.

REFERENCES:
patent: 4280099 (1981-07-01), Rattlingourd
patent: 4456890 (1984-06-01), Carickhoff

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