Digital phase-locked loop circuits with storage of clock error s

Details Digital phase-locked loop circuits with storage of clock error s Digital phase-locked loop circuits with storage of clock error s

1986-11-24

1988-08-09

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Having phase shift

377 44, 328155, 331 1A, G01R 2508, H03L 718

Patent

active

047633425

ABSTRACT:
The digital phase-locked loop circuit extracts the clock signal from a serial flow of coded data by operating so as to determine the phase of the received signal and comparing this phase with that of a locally-generated signal. The error signal obtained from the comparison is digitally filtered and used to correct the phase of local signal. The error with respect to the signal extracted from a prior data stream is stored and used to effect corrections even in the absence of the data flow at the input or in presence of long zero sequences.

REFERENCES:
patent: 4142177 (1979-02-01), Davis
patent: 4538119 (1985-08-01), Ashida
patent: 4606058 (1986-08-01), Kruger et al.
patent: 4626796 (1986-12-01), Elder

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