Digital phase-locked loop circuit

Pulse or digital communications – Spread spectrum – Direct sequence

Patent

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Details

328 63, 328 72, 328155, 331 1A, 375120, H04L 702, H03D 324

Patent

active

046285199

ABSTRACT:
Disclosed is a digital phase-locked loop circuit for telecommunication circuits receiving bipolar codes. The digital phase-locked loop circuit includes a transition timer means for counting a transition duration between a high mark and a low mark in said bipolar code. A clock recovery signal is generated by dividing a transition duration by a value, such as two, to indicate an apparent zero crossing time, and comparing the apparent zero crossing time with the reference clock in the circuit receiving the bipolar code. The reference clock in the receiving circuit is adjusted in response to the clock recovery signal in order to maintain the reference clock substantially in phase with the incoming bipolar code.

REFERENCES:
patent: 4339823 (1982-07-01), Predina et al.

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