Digital phase locked loop circuit

Details Digital phase locked loop circuit Digital phase locked loop circuit

1988-10-19

1990-03-06

Miller, Stanley D.

Pulse or digital communications

Repeaters

Testing

328 72, 375120, H03D 324, H04L 704

Patent

active

049069411

ABSTRACT:
A digital phase locked loop circuit samples the reproduced analog signal of a digital signal at a sampling frequency larger than the bit rate of the digital signal, and arithmetically operates, by using data at a plurality of successive sampling points, an average phase of the reproduced signal in the range from a point where the reproduced signal crosses a reference level to a predetermined sampling point, and makes the phase locked loop control of the reproduced signal by using the operated average phase.

REFERENCES:
patent: 4584695 (1986-04-01), Wong et al.
patent: 4715050 (1987-12-01), Tanaka et al.
IEICE Technical Report EA82-59; "A Data Detection Method for a Stationary Head Digital Tape Recorder"; Sugita et al.; 1982.
Sharp Technical Journal, vol. 34, "Development of Digital Multiplexing Method for Stationary Digital Audio Tape Recording System", M. Takeuchi et al., 1986.
IEICE Technical Report EA86-9, "A Stationary Head Digital Audio Tape Recorder", T. Iwaki et al.; 1986.

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