Digital phase locked loop

Details Digital phase locked loop Digital phase locked loop

1984-07-09

1986-03-18

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

328 14, 328155, 331 17, 331 25, H03L 718

Patent

active

045771634

ABSTRACT:
A digital phase locked loop is provided by the present invention which includes a digital controlled oscillator (DCO), whereby the frequency of the output signal of the DCO is a function of the value associated with a digital input word. The frequency of the output signal of the DCO is phase compared to a reference signal by a phase comparator. Depending upon which signal is leading or lagging, the phase comparator outputs an increment signal or a decrement signal. These increment and decrement signals are operatively coupled to an up/down counter which provides the digital input word to the DCO, the value of the digital input word being modified by the increment or decrement signal to cause the frequency of the output signal to track the frequency of the input signal to the phase comparator, i.e., the frequency of the reference signal.

REFERENCES:
patent: 4144489 (1979-03-01), Ward et al.
patent: 4380742 (1983-04-01), Hart
Szymonski, "An Improved DCO Scheme for Digital Phase Locked Loops", Electronic Engineering, Mar. 1977, pp. 24, 25, (328-155).

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