Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Having phase shift
Patent
1981-04-07
1984-07-24
Thomas, James D.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Having phase shift
377 47, 377 78, 377104, 331 1A, H03B 304
Patent
active
044621108
ABSTRACT:
A phase-locked loop is implemented using strictly digital techniques. The average frequency of the input signal is first sampled by counting the number of pulses from a clock source which occur during a predetermined number of occurrences of the input signal. Thereafter, the number of pulses counted is divided by the number of cycles of the input signal which occurred during the counting period to determine an average number of pulses per input signal cycle. The number of pulses which occur between successive cycles of the input signal are then counted and compared against the previously determined average. A count which differs from the average indicates a change in phase of the input signal, and after appropriate weighting, is used to update the average to a new average. An output signal is produced when the number of pulses counted during a cycle of the input signal equals the average number of pulses determined to occur between successive cycles of the input signal.
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Baldwin David R.
Lemak Nicholas S.
Holloway, Jr. W. W.
Honeywell Information Systems Inc.
Marhoefer L. J.
Sapelli A. A.
Thomas James D.
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