Digital phase lock loop divider cycling method, apparatus, and c

Details Digital phase lock loop divider cycling method, apparatus, and c Digital phase lock loop divider cycling method, apparatus, and c

1998-09-25

2000-09-05

Le, Dinh T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327156, 327147, 327148, 327544, H03L 706

Patent

active

061148881

ABSTRACT:
The current disclosure is directed toward part or all digital phase lock loop circuits, particularly those containing divide by N circuits between the voltage controlled oscillator and the phase detector. These divide by N circuits many times contain long logic count down chains. In power sensitive applications the amount of power dissipated by these divide by N circuits may be significant. The current disclosure is directed to apparatus and methods of cycling these divide by N circuits between enabled and disabled to conserve power. The changing of the enabled/disabled frequency and the duty cycle of the disabling of the divider is contemplated, as are the various ancillary factors that might be considered in determining this frequency and duty cycle. Stabilization of the loop is considered as is the changing of gain of the phase lock loop in order to improve operation as the dividers are enabled and disabled.

REFERENCES:
patent: 4893271 (1990-01-01), Davis et al.

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