Digital phase lock loop

Details Digital phase lock loop Digital phase lock loop

1987-12-23

1989-01-03

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307262, 328 55, 375119, H03K 513, H03K 522

Patent

active

047959851

ABSTRACT:
A digital phase lock loop utilizing a programmable delay line to phase shift the output of a crystal generated reference clock signal and lock it to digitized data transitions recorded on a suitable medium is provided. The output of the delay line is compared to the digitized data transitions in a phase detector to determine if the delay line output leads or lags the data transitions. The delay line is then reprogrammed to reduce the phase difference between the data transition and the delay output to a minimum value.

REFERENCES:
patent: 3983497 (1976-09-01), Hegeler
patent: 4095186 (1978-06-01), Vesel
patent: 4229824 (1980-10-01), En
patent: 4461014 (1984-06-01), Fujino

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