Digital phase-lock loop

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

375 96, 331 1R, H03D 324

Patent

active

050739077

ABSTRACT:
An improved digital phase lock loop incorporates several distinctive features that attain better performance at high loop gain and better phase accuracy. These features include: phase feedback to a number-controlled oscillator in addition to phase rate; analytical tracking of phase (both integer and fractional cycles); an amplitude-insensitive phase extractor; a more accurate method for extracting measured phase; a method for changing loop gain during a track without loss of lock; and a method for avoiding loss of sampled data during computation delay, while maintaining excellent tracking performance. The advantages of using phase and phase-rate feedback are demonstrated by comparing performance with that of rate-only feedback. Extraction of phase by the method of modeling provides accurate phase measurements even when the number-controlled oscillator phase is discontinuously updated.

REFERENCES:
patent: 4426712 (1984-01-01), Giorski-Popiel
patent: 4769816 (1988-09-01), Hochstadt et al.
patent: 4794341 (1988-12-01), Barton et al.
patent: 4821294 (1989-04-01), Thomas, Jr.
patent: 4888564 (1989-12-01), Ishigiaki
patent: 4890305 (1989-12-01), Devries
A Survey of Digital Phase-Locked Loops, by William C. Lindsey and Chak Ming Chie, Proceedings of the IEEE, vol. 69, No. 4, Apr. 1981, pp. 410-431.
Design and Performance of Sampled Data Loops for Subcarrier and Carrier Tracking, by S. Aguirre and W. J . Hurd, TDA Progress Report 42-79, Jul.-Sep. 1984, pp. 81-95.
A Comparison of Methods for DPLL Loop Filter Design, by S. Aguirre, W. J. Hurd, R. Kumar and J. Statman, TDA Progress Report 42-87, Jul.-Sep. 1986, pp. 114-124.

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