Digital phase aligner with outrigger sampling

Details Digital phase aligner with outrigger sampling Digital phase aligner with outrigger sampling

1987-08-26

1989-04-11

Pellinen, A. D.

Pulse or digital communications

Spread spectrum

Direct sequence

375 83, 375 85, 375111, H03D 324

Patent

active

048212962

ABSTRACT:
The circuit phase aligns a phase-varying input data stream with a local clock. The data stream is sampled at the 0.degree. and 180.degree. phases of the local clock. Two pairs of outrigger samples which closely bracket the aforementioned primary samples are also obtained by the sextet sampler. Adjacent pairs of the six samples are applied to Ex-Or gates to yield disagreement signals which indicate the locations of data transitions relative to the samples. The primary samples (0.degree. and 180.degree.) are serially loaded into different halves of a biphase register, the taps of which provide the output with differently delayed versions of the input data at either 0.degree. or 180.degree.. A control circuit analyzes the disagreement signals and provides control signals to a counter which determines which of the biphase register taps is connected to the output. The output is a replica of the input which is synchronized with the local clock.

REFERENCES:
patent: 4216544 (1980-08-01), Boleda et al.
patent: 4280099 (1981-07-01), Rattingourd
patent: 4414676 (1983-11-01), Kraul et al.

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