Digital pattern decoder

Pulse or digital communications – Spread spectrum – Direct sequence

Patent

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Details

3401462, 36471511, 375116, H04L 708

Patent

active

049568540

ABSTRACT:
A decoder decodes a predetermined binary pattern from within a data stream, wherein the pattern includes a repetitious series of binary digits and each series of digits is composed of 2N bits, N being a positive integer greater than 1, and the first N bits is the complement of the second N bits of the series. The decoder includes a bit synchronizer for synchronizing to the bits of the pattern, a digital phase locked loop for generating a clock signal from the received data, a comparator and memory for analyzing the data stream in an alternating manner so as to generate N paths, wherein each path receives every Nth respective bit of the data stream, and an arithmetic logic unit for calculating and measuring the integrity of the pattern in the received data.

REFERENCES:
patent: 3493929 (1970-02-01), Webb
patent: 4160240 (1979-07-01), Partipilo
patent: 4389636 (1983-06-01), Riddle, Jr.
patent: 4829462 (1989-05-01), Freeman et al.
patent: 4876740 (1989-10-01), Levine et al.

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