Digital open loop programmable frequency multiplier

Details Digital open loop programmable frequency multiplier Digital open loop programmable frequency multiplier

1979-03-19

1981-01-06

Malzahn, David H.

Boots, shoes, and leggings

307225R, 328 38, G06F 752, H03K 500

Patent

active

042440270

ABSTRACT:
A circuit arrangement for multiplying the frequency f.sub.x of an input signal by digital techniques is disclosed. A digital counter driven by a reference oscillator establishes the ratio of the reference frequency to signal frequency. The binary representation of this ratio is applied to a binary divider circuit and divided by the frequency multiplying factor M. The quotient produced is applied to program a presettable binary down-counter operating on the reference frequency f.sub.o to produce an output frequency Mf.sub.x where the components of the reference frequency are caused to cancel out.

REFERENCES:
patent: 3970954 (1976-07-01), Even
patent: 3982199 (1976-09-01), Green
patent: 4017719 (1977-04-01), Kaplan et al.
patent: 4025866 (1977-05-01), Fletcher et al.

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