Digital noise reducing apparatus for a video signal processing r

Details Digital noise reducing apparatus for a video signal processing r Digital noise reducing apparatus for a video signal processing r

1984-10-17

1987-06-30

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358336, 358340, H04N 5211, H04N 594

Patent

active

046774874

ABSTRACT:
A digital noise reducing apparatus improves the signal to noise ratio (S/N) of a luminance signal of a video signal reproduced from a recording medium. This apparatus includes: an analog to digital (A/D) converting circuit for converting the luminance signal into a digital luminance signal; a digital delay circuit for delaying the digital luminance signal by one horizontal scanning period (1H); a first calculating circuit for calculating the difference between the digital luminance signal and the delayed digital luminance signal; a limiting circuit for limiting the amplitude of an output signal of the first calculating circuit, and a second calculating circuit for subtracting a signal output which is from the limiting circuit from the digital luminance signal. The apparatus operates to reduce noise at the line offset frequency of the luminance signal.

REFERENCES:
patent: 4291333 (1981-09-01), Warnock
patent: 4302768 (1981-11-01), Kamura
patent: 4398219 (1983-08-01), Yasuda

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