Patent
1989-07-03
1994-01-04
MacDonald, Allen R.
G06F 1518
Patent
active
052767736
ABSTRACT:
A digital neural network has a plurality of neurons (NR) completely meshed with one another, each of which comprises an evaluation stage having a plurality of evaluators (B) that is equal in number to the plurality of neurons (NR) and each of which comprises a decision stage having a decision unit (E). An adjustment information (INF.sub.E) that effects a defined pre-adjustment of the decision unit (E) can be supplied to every decision unit (E) by a pre-processing means via an information input. A weighting information (INF.sub.G) can be supplied to every evaluator (B) by a pre-processing means via an individual information input. An output information (INF.sub.A) can be output by every decision unit (E) to a post-processing means via a respective individual information output. The information outputs of the decision units (E) are each connected to an individual processing input of all evaluators (B) allocated to the appertaining decision unit (E). Individual processing outputs of the evaluators (B) are connected to individual processing inputs of the decision unit (E) in the appertaining neuron (N), so that every output information (INF.sub.A) can be indirectly fed back onto every neuron (NR).
REFERENCES:
patent: 4660166 (1987-04-01), Hopfield
patent: 4731747 (1988-03-01), Denker
patent: 4737929 (1988-04-01), Denker
patent: 5014219 (1991-05-01), White
Murray et al., "Asynchronous VLSI Neural Networks Using Pulse-Stream Arithmetic", IEEE Jour. of Solid-State Circuits, vol. 23 No. 3, Jun. 1988, pp. 56-65.
Verleisen et al., "An Analog VLSI Implementation of Hopfield's Neural Network", IEEE Micro Dec. 1989 pp. 46-55.
Silviotti et al., "A Novel Associative Memory Implemented Using Collective Computation", 1985 Chapel Hill Conference on VLSI, 1985, pp. 11-21.
Lippmann "An Introduction To Computing With Neural Nets", IEEE ASSP, Apr. 1987, pp. 4-22.
IEEE Int'l Solid-State Circuits Conference, 1987, "Session XXII VLSI Systems and Architectures", pp. 304, 305, 437.
Graf, et al. "VLSI Implementation Of A Neural Network Memory With Several Hundreds of Neurons", 1986, pp. 182-187.
Hubbard, et al. "Electronic Neural Networks", 1986, pp. 227-234.
Sage, et al. "An Artificial Neural Network Integrated Circuit Based On MNOS/CCD Principles", 1986, pp. 381-385.
Knauer Karl
Pandel Juergen
Pfleiderer Hans-Joerg
Ramacher Ulrich
MacDonald Allen R.
Siemens Aktiengesellschaft
LandOfFree
Digital neural network executed in integrated circuit technology does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital neural network executed in integrated circuit technology, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital neural network executed in integrated circuit technology will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-313962