Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1997-09-04
2000-07-04
Malzahn, David H.
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
708631, G06F 752
Patent
active
060852143
ABSTRACT:
A digital parallel multiplier having encoders for each segmented bit pair of the multiplier input data and which selects one of 4 coefficients, based on the sum of the bit pair, that are then applied to the multiplicand input data. When a 3X coefficient of the multiplicand input data is to be generated, a -1 coefficient is output by the encoder requiring the 3X coefficient, and a 1 is added to the sum of the next most significant bit pair.
REFERENCES:
patent: 3456098 (1969-07-01), Gomez et al.
patent: 3691359 (1972-09-01), Dell et al.
patent: 4864529 (1989-09-01), Shah et al.
patent: 5220525 (1993-06-01), Anderson et al.
patent: 5325321 (1994-06-01), Ishida
patent: 5333119 (1994-07-01), Raatz et al.
patent: 5506799 (1996-04-01), Nakao
patent: 5638313 (1997-06-01), Chu
patent: 5754459 (1998-05-01), Telikepalli
Cirrus Logic Inc.
Lott Robert D.
Malzahn David H.
Rutkowski Peter J.
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