Digital multiplexer with logically allocatable channels and bit

Details Digital multiplexer with logically allocatable channels and bit Digital multiplexer with logically allocatable channels and bit

1992-04-17

1994-05-24

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 84, H04J 304

Patent

active

053155963

ABSTRACT:
A data multiplexer system is comprised of a space division multiplexer having a plurality of space divided (SDM) input channels, each SDM channel adapted to carry a first number of time divided TDM channels at a first clock rate; at least one digital data source; apparatus for generating a second clock rate derived from the first clock rate, which is at the clock rate of the data source; apparatus for selecting data from the one source in synchronism with the second clock rate; and apparatus for applying the selected data to at least one of the SDM channels; whereby data from a digital data source having a clock rate either the same or different from the clock rate of a TDM channel may be applied to and be carried by any SDM channel.

REFERENCES:
patent: 4157458 (1979-06-01), Roche
patent: 4330856 (1982-05-01), Takasaki et al.
patent: 4345323 (1982-08-01), Chang
patent: 4410980 (1983-10-01), Takasaki et al.
patent: 4744082 (1988-05-01), Fujimura et al.
patent: 4914655 (1990-04-01), Johannes et al.

Affiliated with

Also associated with

Rating

Digital multiplexer with logically allocatable channels and bit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital multiplexer with logically allocatable channels and bit , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital multiplexer with logically allocatable channels and bit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1978893