Data processing: generic control systems or specific application – Specific application – apparatus or process – Electrical power generation or distribution system
Reexamination Certificate
2002-08-29
2004-09-07
Paladini, Albert W. (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Electrical power generation or distribution system
C700S291000, C700S306000, C361S093200
Reexamination Certificate
active
06789001
ABSTRACT:
The present invention relates to a digital multifunction relay having improved characteristics. Digital multifunction relays are well known in the state of the art. They are generally used, in a power distribution network, for controlling the operation of protection devices that have the aim of protecting the power distribution network from fault events for example tripping devices or disconnectors or the like, particularly in the voltage range from 1 KV to 35 KV). Digital multifunction relays can control the operating state of these protection devices and can host many different protection functions, that can be software objects consisting generally of a processing stage and of a state machine stage. Digital multifunction relays generally comprise a digital signal processor DSP which is generally connected to an analog digital AD converter. The A/D converter receives signals from sensors positioned on the power distribution network. These sensors measure some predefined power distribution quantities for example current and/or voltage. The DSP receives, from the A/D converter, sampled values of these predefined quantities and processes the sampled values, in order to obtain some calculated values. The calculated values are used for detecting the presence of a fault event. Based on the calculated values, the DSP generates signals for regulating, the operating state of the protection devices, by means of the mentioned protection functions. For example, the DSP can perform mathematical calculations, such as FFT Fast Fourier Transform algorithms, or determine other quantities such as the transmitted electric power or the equivalent resistance of a branch of the power distribution network. All these described processing activities, performed by the DSP, are commonly defined as “foreground processing activity”. It is known that all the foreground processing activity must be executed in a period of time, which elapses between the acquisition of two consecutive sampled values hereinafter defined as “sampling period”. Referring to
FIG. 1
a
, the two instants of acquisition of the sampled values 8 are indicated with T
A
and T
C
, while the sampling period is indicated with T
S
. The period of time for executing the foreground processing is indicated with T
F
. After having completed the entire foreground processing, the DSP is kept in a state of idle, for the period of time T
I
, remaining before the instant Tc.
This processing activity can be run by the DSP in cooperation with a microcontroller.
It is also known that the DSP must accomplish other processing tasks. For example, it must run some non-periodic tasks that are, for example, needed for regulating the acquisition of the sampled values or for generating signals for controlling the mentioned protection devices. This kind of processing activities is generally called “background processing activity”. Also this processing activity can be run in cooperation with a microcontroller. In this case, the DSP must also handle the communication with the microcontroller.
Digital multifunction relays of the state of the art are characterized by some drawbacks.
These non periodic processing tasks are generally performed by means of interrupt routines that are characterized by a high level of priority. This fact means that each time a background processing activity T
B
is run, an interruption of the foreground processing activity is provoked. As illustrated in
FIG. 1
b
, the foreground activity is therefore delayed and the period of time, in which the DSP is kept in an idle state T
I
is reduced. This fact corresponds to an increase of the run-time computational load related to the DSP. The more the period T
I
is reduced, the more the run-time computational load is increased. If T
I
is equal to zero, the total computational load is equal to the 100%. The run-time computational load can be higher than 100%, for example, due to the fact that a large amount of background activity is executed. In this way, the foreground processing cannot be completed before the instant T
C
(
FIG. 1
c
and the start of the processing of the next samples is delayed by some amount.
If the delay is too high, a sampled value can be overwritten, before being processed. This fact means that some sampled values might be lost, with consequent imprecision of the performed calculations and possible wrong operation of the protection functions i.e. wrong start of protection functions or, at worst, wrong control signals sent to the protection devices.
Some solutions of the state of the art, has tried to overcome this problem measuring the average amount of processing activity run by the DSP. This measure is generally executed “a priori ”, therefore in a static mode, or using an external microcontroller.
The average amount of processing activity can give an indication whether the overload condition is a frequent event or not. In the first case, the used DSP could be changed with a more powerful one. In the second case, the overload condition can be sustained, because it is related to a limited period of time.
Unfortunately, this kind of approach is not very useful in practice. No regulation of the computational load is carried out run-time. Moreover, this approach can be expensive and not very flexible, if new functions are requested to the digital multifunction relay. Further, bearing a condition of overload could bring to the failure of the digital multifunction relay. In fact, even if the DSP comes back to normal load conditions, during the period of overload dangerous computational errors can be made. This fact can bring to undesired operations of the controlled protection devices.
Therefore, one aspect of an embodiment of the invention is directed to realizing a digital multifunction relay, which allows avoidance of run-time computational overload conditions in the digital signal processor.
Within this aim, another of the aspect of the invention is to realize a digital multifunction relay, which easily identifies conditions of run-time, computational overload in the digital signal processor.
Another aspect of the invention is to realize a digital multifunction relay, which allows execution of run-time regulation of the run-time computational load in the digital signal processor.
Another aspect of the invention is to realize a digital multifunction relay, which allows operating a temporary reduction in the run-time computational load, if a condition of overload is identified.
Another aspect of the invention is to realize a digital multifunction relay, which can be easily adapted to accept a change in requested functionality, to avoid expensive operations.
Thus, various aspects of embodiments of the invention provide a digital multifunction relay, for controlling one or more protection devices in a power distribution network, at least a digital signal processor for executing a set of processing activities for regulating an operating state of the protection devices.
At least one aspect of the claimed digital multifunction relay includes a first computerized means for calculating a run-time or real-time computational load experienced by the digital signal processor. A second computerized means for reducing the run-time computational load experienced by the digital signal processor is operative if the run-time computational load exceeds a predefined threshold.
It should be noticed that the digital multifunction relay, according to aspects of the invention, allows achieving various objectives which overcome shortcomings of conventional approaches. In fact, use of the first computerized means allows easy detection of a condition of run-time computational overload.
The calculation of the computational load is performed at run-time, i.e., in real-time, which means that, for every sampling period elapsing between two instants of acquisition of the sampled values, the computational load is computed. This allows immediate correction of the run-time computational load. This is made feasible by virtue of the presence of the second computerized means, which allows reducing, immedi
ABB T&D Technology Ltd.
Connolly Bove & Lodge & Hutz LLP
Hume Larry J.
Paladini Albert W.
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