Digital modulator and demodulator circuit

Details Digital modulator and demodulator circuit Digital modulator and demodulator circuit

1992-12-08

1995-06-06

Williams, Howard L.

Coded data generation or conversion

Digital code to digital code converters

To or from variable length codes

341 59, H03M 740

Patent

active

054226414

ABSTRACT:
In a digital modulator circuit for modulating a fixed-length code into a variable-length code and a digital demodulator for demodulating a variable-length code into a fixed-length code in a parallel data form, pre-modulation and pre-demodulation data is input to a logic circuit in synchronization with a pulse input, while a remainder of the fixed-length or variable-length code digital parallel input data taking place in modulating or demodulating process is fed back as an input to the logic circuit via a flip-flop to modulate or demodulate the data together with pre-modulation or pre-demodulation parallel data input at the next input pulse in a parallel data form. A post-modulation or post-demodulation data as well as a modulation or demodulation bit number output from the logic circuit are input to the buffer circuit to output post-modulation or post-demodulation data of which bits have been all modulated or demodulated.

REFERENCES:
patent: 4115768 (1978-09-01), Eggenberger et al.
patent: 4337458 (1982-06-01), Cohn et al.
patent: 4568916 (1986-02-01), Bahgat
patent: 4860324 (1989-08-01), Satomura
patent: 4914675 (1990-03-01), Fedele
patent: 4985700 (1991-01-01), Mikami
patent: 5079548 (1992-01-01), Fujiyama et al.
patent: 5173694 (1992-12-01), Lynch, Jr. et al.
patent: 5175545 (1992-12-01), Uchiyama
patent: 5233348 (1993-08-01), Pollmann et al.
IBM Technical Disclosure Bulletin, vol. 29, No. 1, pp. 32-34 (Jun., 1986).

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