Digital modulated clock circuit for reducing EMI spectral densit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

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327 35, 327114, 327164, H04L 700

Patent

active

057317283

ABSTRACT:
A method and circuit spreads the narrow band emitted EMI of a clock signal. A first, high frequency, clock signal is received, for example, from an oscillator. The first clock signal is modulated, to produce a second clock signal, by inverting the first clock signal x times per L transitions of the first clock signal, where x and L are integers and x<L. Each inversion removes one transition of the first clock signal. The modulated clock signal has reduced EMI spectral density and may be utilized as a microprocessor high frequency master clock signal. Significantly, the modulated clock signal is synchronous with the first clock so that other circuitry which synchronizes to the modulated clock signal is also synchronized to the first clock signal clock. If needed by a particular system (e.g., a system which has a digital signal processor, and the digital signal processor has an analog front end), the second clock signal is divided by M, where M is an integer evenly divisible into L-x, to generate a third, jitter-free, clock signal which may be utilized by the microprocessor analog front end. By "dividing", it is meant that the third clock signal has one "first polarity" transition (i.e., low-high or high-low) per M first polarity transitions of the modulated clock signal. The circuitry for dividing the modulated clock signal may integrated with the modulated clock generation circuitry or, alternately, may be integrated into the particular circuitry (e.g., microprocessor) which requires the divided clock signal.

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patent: 5537068 (1996-07-01), Konno

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