Digital matched filter bank for othogonal signal set

Details Digital matched filter bank for othogonal signal set Digital matched filter bank for othogonal signal set

2000-06-22

2004-10-05

Chin, Stephen (Department: 2634)

Pulse or digital communications

Spread spectrum

Direct sequence

C375S153000, C375S143000, C375S149000, C375S343000

Reexamination Certificate

active

06801569

ABSTRACT:

FIELD OF THE INVENTION
The concepts involved in the present invention relate to spread-spectrum communications and particularly to application of matrix processing to a matched-filter, used for example to recognize chip-code sequences within a spread-spectrum signal.
BACKGROUND
Mobile communication is becoming increasingly popular, at much the same time that more and more customers are asking for ever higher data-rate services. Increasingly, development efforts are focusing on techniques for high-capacity communication of digital information over wireless links.
Spread-spectrum is a method of modulation, like FM, that spreads a data signal for transmission over a bandwidth, which substantially exceeds the data transfer rate. Spread-spectrum is now finding frequent application to wideband communication over wireless links. Direct sequence spread-spectrum involves modulating a data signal with a pseudo-random chip sequence. The spread-spectrum signal is transmitted as a radio wave over a communications media to the receiver. The receiver despreads the signal to recover the information data.
Receiving the spread spectrum communications therefore requires detection of one or more spreading chip-code sequences embedded in an incoming spread-spectrum signal as well as subsequent synchronization of the receiver to the detected chip-code sequence. Initial detection and phase synchronization of the spreading chip code sequence(s) in the receiver is commonly known as code acquisition. Although simple correlators have been used in the code acquisition for reception of spread-spectrum signals, faster and more effect techniques for code acquisition rely on matched filters.
A matched filter essentially matches an input signal to a reference chip-code sequence signal, by multiplying a set of N samples of the input signal with the reference signal, then summing the product terms to determine a value of correlation of the input signal to the reference signal. If the correlation value exceeds a threshold, then a decision circuit indicates that there is a match. A bank of matched filters may process the input in parallel, to determine the correlation to a plurality of codes. The reference code having the highest correlation with the input is selected as the match to the code contained in the received spread spectrum signal.
Although the matched filter is an effective technique for detecting a code sequence within a received spread-spectrum signal, implementation for detecting a number of possible codes may be quite hardware intensive. Particularly for relatively long chip code sequences, each of the matched filters in a bank of filters requires a large number of adders in the form of an extensive adder tree, to complete the computation of the correlation value for use in determining if there is a match to the reference chip-code sequence signal.
To appreciate the problem, it may be helpful to consider some examples.
FIG. 1
shows an example of a matched filter bank
11
for detecting a plurality of 1 to N chip-code sequences. An analog to digital converter (not shown) digitizes a received spread-spectrum signal. The resulting input signal with K bits is sequentially input to a tapped delay line. The delay line essentially comprises N delay devices
13
with a tap before the first delay device, taps between the delay devices, and a tap after the last delay device as shown. Each matched filter
15
receives the same inputs, specifically the input signal as well as the delayed input from each output of a delay device
13
in the line. However, each filter receives a different chip-code sequence for use as a reference and therefore attempts to recognize a different code sequence within the bit stream derived from the received spread-spectrum signal.
Each filter
15
outputs a correlation value m(k). Because there are K bits in the input sample, each output m will include K+L bits, where L is the number of layers within the filters
15
. Overall the filter bank
11
will produce a matrix of correlation values m
1
(k),m
2
(k) . . . m
N−1
(k).
FIG. 2
is a block diagram useful in understanding the implementation of one of the matched filters
15
. Specifically, the block diagram shows one L-layered structure for performing the matched filter function. The matched filter comprises a plurality of multipliers
17
. The filter includes one such multiplier
17
for receiving each of the input bit sequences from the input and the taps between the delays
13
of the delay line. Assume for discussion purposes that each reference code comprises a sequence S
i,0
S
i,1
. . . S
i,N
S
0,N−1
. The first code sequence, for example, would be S
0,0
S
0,1
. . . S
0,N
S
0,N−1
. Each multiplier therefore receives a portion of reference code sequence S
i,0
S
i,1
. . . S
i,N
S
0,N−1
for multiplication with the respective delayed portion of the input bit stream r.
Assuming that a code bit may have a value of 1 or −1 (corresponding to 0, 1 in digital notation), each multiplication operation will have an output value of 1 if the input value and the reference value are the same (1x1 or −1x−1). Each multiplication operation will have an output value of −1 if the input value and the reference value are different (1x−1 or −1x1). To determine an overall correlation to the complete reference code, the outputs of the multipliers are summed in pairs, through layers of adders
19
,
20
, and
21
. The last adder
21
outputs the total correlation value, which represents how closely the input bit stream matched the reference sequence. For a perfect match, for example, the output of the adder
21
would be N. If there is no match at all, the output of the adder
21
would be 0. However, in an implementation processing real received spread-spectrum signals, there will be some variable degree of matching.
Returning to
FIG. 1
, each matched filter will output a value m(k) representing the degree of correlation between the input and the respective reference chip-code sequence. A decision element, not shown compares the output of each matched filter
15
to a threshold and/or to the values from the other filters to determine the most likely match to one of the reference code sequences.
With this type of matched filter approach, assume for discussion that the input has K bits, and the orthogonal signal set is of 64 Walsh codes with any cover code of a length of 64. The receiver would require a bank having 64 matched filters. Each matched filter would have:
32: 
K
bit adders
16: 
K + 1
bit adders
8:
K + 2
bit adders
4:
K + 3
bit adders
2:
K + 4
bit adders
1:
K + 5
bit adders
Totally, there would 64(63K+57)=4032K+3,648 of bit addition operations. When K=4, the receiver would require (4,032(4)+3,648) of bit additions, that is to say 19,776 of bit additions. If K=8, then the receiver actually would require (4,032(8)+3,648) of bit additions, that is to say 35,904 of bit additions. Although these additions may be implemented in software, for spread-spectrum receivers, they are typically implemented as hardware in an ASIC. Each adder consumes space on the actual chip. Each adder increases the complexity of design and manufacture of the chip. Also, each adder requires additional power, which is a particularly scarce resource in a mobile wireless receiver.
Hence there is a clear need for a technique to reduce the computations and thus the amount of hardware needed to implement the matched filter bank in a spread-spectrum receiver.
SUMMARY OF THE INVENTION
Accordingly, a general objective of the invention is to achieve improved processing in a matched filter-bank, typically for use in a receiver for spread-spectrum signal processing, to enable accurate code detection with substantially reduced numbers of computations and thus with reduced requirements for hardware.
Another objective relates to use of matrix processing to allow code detection on a smaller portion of a code matrix, and thus on a reduced

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