Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
1999-10-26
2003-06-10
Chin, Stephen (Department: 2634)
Pulse or digital communications
Spread spectrum
Direct sequence
C375S343000
Reexamination Certificate
active
06577676
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a digital matched filter used in a receiver of CDMA (Code Division Multiple Access) system.
As is well known in the art, a digital matched filter is a filter for deriving the correlation between a received signal subjected to a spread spectrum process on the transmitter side and various types of spread codes.
FIG. 7
shows a conventional digital matched filter having a code length “4”. The conventional digital matched filter includes a shift register
110
, coefficient registers
211
to
214
, multiplier unit
300
and adder unit
400
.
The shift register
110
includes four receiving registers
111
to
114
and a spread spectrum signal converted into a digital signal by a preceding stage A/D converter (not shown) is input to and stored in the receiving register
111
. Then, the spread spectrum signal stored in the receiving register
111
is sequentially shifted to the receiving registers
112
,
113
,
114
in response to a clock signal (not shown).
Further, each of the receiving registers
111
to
114
outputs the spread spectrum signal stored in response to the clock signal to the multiplier unit
300
.
The coefficient registers
211
to
214
respectively store spread codes set by a controller (not shown) and outputs the stored spread codes to the multiplier unit
300
in response to the clock signal.
The multiplier unit
300
includes multipliers
301
to
304
, and the multiplier
301
multiplies the spread spectrum signal input from the receiving register
111
by the spread code input from the coefficient register
211
and outputs the result U
0
of multiplication to the adder unit
400
.
Likewise, the multiplier
302
multiplies the spread spectrum signal from the receiving register
112
by the spread code from the coefficient register
212
, the multiplier
303
multiplies the spread spectrum signal from the receiving register
113
by the spread code from the coefficient register
213
, and the multiplier
304
multiplies the spread spectrum signal from the receiving register
114
by the spread code from the coefficient register
214
, and the multipliers
302
,
303
,
304
respectively output the results U
1
, U
2
, U
3
of multiplication to the adder unit
400
.
The adder unit
400
adds together the multiplication results U
0
and U
1
and the multiplication results U
2
and U
3
and further adds together the results of addition. Then, the adder
400
outputs the addition result of the largest value among the finally obtained added values obtained at each preset time, that is, the largest correlation value to the controller. Thus, the controller recognizes that its own code is received when the largest correlation value appears. At this time, the controller sets the timing at which the code is detected in the finger of the receiver. As a result, the finger always receives a signal transmitted to itself at this timing.
In the conventional digital matched filter described above, since the contents of the shift register are changed in each cycle, an input to the multiplier is changed. On the other hand, the spread code from the coefficient register is kept unchanged. Therefore, the multiplication result of the multiplier is changed in each cycle and data input to the adder unit is also changed. The adder unit
400
effects the adding operation according to input data. In other words, the adder unit
400
effects the adding operation by selectively turning ON/OFF gates constructing the adders in response to an input signal, and as a result, power consumption occurs each time the gate is turned ON/OFF. That is, the gate is turned ON/OFF in each cycle and power consumption occurs.
Recently, in a mobile communication apparatus of a mobile communication system using the CDMA system, various studies and developments are made in order to reduce the power consumption thereof, extend the continuously serviceable time and make the battery size small. This also applies to the matched filter described above and the power saving thereof is strongly required.
BRIEF SUMMARY OF THE INVENTION
An object of this invention is to provide a digital matched filter capable of reducing power consumption.
Further, an object of this invention is to provide a digital matched filter capable of deriving correlation values with respect to a plurality of spread spectrum signals of different code lengths.
A digital matched filter according to this invention comprises a plurality of spread signal memories capable of storing received spread spectrum signals, a memory controller which causes the received spread spectrum signal to be stored into one of the plurality of spread signal memories according to a preset order, a shift register including a plurality of registers for storing the spread codes, for shifting the spread code between the registers, a plurality of multipliers each provided for one of the plurality of spread signal memories and one of the registers constructing the shift register, for multiplying the spread spectrum signal stored in a corresponding one of the spread signal memories by the spread code stored in a corresponding one of the registers, and a correlation unit which adds together the results of multiplication by the plurality of multipliers to derive the correlation between the received spread spectrum signal and the spread code stored in the shift register.
When the spread spectrum signal received from the communication destination is multiplied by the spread code in order to derive the correlation between the spread spectrum signal and the spread code, the digital matched filter causes the shift register to shift the spread code generally having a smaller amount of information than the spread spectrum signal and sequentially store the spread spectrum signal into the plurality of spread signal memories corresponding to the multipliers. Each of the multipliers multiplies the spread spectrum signal stored in a corresponding one of the spectrum signal memories by the spread code stored in a corresponding one of the registers of the shift register.
Therefore, according to the present digital matched filter, since a total variation amount of information stored in each register is smaller than in a case where the spread spectrum signal generally having a larger amount of information is shifted by the shift register and multiplied by the spread code, the number of ON/OFF operations of the gate constructing the digital matched filter can be reduced and the power consumption can be reduced.
Further, in order to attain the above object, in a digital matched filter according to this invention, the spread signal storage control unit causes data stored in each of a plurality of registers constructing a shift register and corresponding to a plurality of spread signal memories to output to a corresponding one of the spread signal memories. In other words, the spread signal storage control unit stores one flag data into the plurality of registers and shifts the flag data in a loop form between the registers to be output from the shift register to a corresponding one of the spread signal memories in response to the shifting operation of the shift register. In a case where the received spread spectrum signal is input to the plurality of spread signal memories and flag data is input from a corresponding one of the registers of the spread signal storage controller, the plurality of spread signal memories store the spread spectrum signal and the shift register stores the spread code. The coefficient shift register includes a plurality of registers corresponding to a plurality of multipliers and shifts the spread code in a loop form between the plurality of registers. The shift controller variably controls the number of registers used in the loop shifting operation in the spread signal storage controller and the number of registers used in the loop shifting operation in the shift register according to the code length of the spread spectrum signal.
With the present digital matched filter, the number of registers used in the loop shift
Chin Stephen
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Odom Curtis
LandOfFree
Digital matched filter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital matched filter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital matched filter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3137479