Digital logic level comparator particularly for digital test sys

Details Digital logic level comparator particularly for digital test sys Digital logic level comparator particularly for digital test sys

1982-06-18

1985-06-11

Strecker, Gerard R.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

Nonquantitative

324 73R, 340661, G01R 19165

Patent

active

045231435

ABSTRACT:
A digital comparator for determining whether a digital test signal qualifies as an expected logic level, particularly suited to in-circuit digital testing applications. First and second comparing circuits, each formed by a differential amplifier circuit, receive the test signal, a high threshold signal and a low threshold signal. A control circuit selectively enables and inhibits the two comparing circuits so that only one is operative at any instant depending on the expected level of the test signal. The output terminals of the comparing circuits are connected so that the enabled one of the comparing circuits directly provides a pass/fail indication. A standby circuit allows both comparing circuits simultaneously to be selectively energized or deenergized, and an input buffer circuit permits the selective variation of the input impedance of the comparing circuit on the basis of the type of test being performed.

REFERENCES:
patent: 3742351 (1973-06-01), Palmer et al.
Edgington et al., Diagnostic Probe, IBM Technical Disclosure Bulletin, vol. 12, No. 6, Nov. 1969, pp. 828, 829.
Czechlewski et al., Pulse and Level Detector Circuit, Western Electric Technical Digest, No. 35, Jul. 1974, pp. 11-13.
Saul, Peter, A Versatile Voltage Monitor for Multi-Rail Systems, Electron, No. 124, Oct. 13, 1977, p. 80.

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