Digital logic for separating data and clock in Manchester-encode

Details Digital logic for separating data and clock in Manchester-encode Digital logic for separating data and clock in Manchester-encode

1978-09-05

1980-09-09

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

375110, 364900, H04L 702

Patent

active

042221161

ABSTRACT:
A single-chip microcomputer comprises a CPU (1), a RAM (2), a ROM (3), a timer (4), serial I/O communication logic (5), and four I/O ports (11-14).
The serial I/O communication logic includes a shift register (RBA-RBH, FIG. 8J) to separate the data and clock signals in a Manchester-encoded data stream. The Manchester encoding is adaptable to any data rate simply by changing the frequency of a high speed clock associated with the shift register.

REFERENCES:
patent: 3509277 (1970-04-01), Moore et al.
patent: 3737895 (1973-06-01), Cupp et al.
patent: 3753114 (1973-08-01), Hurley
patent: 3789303 (1974-01-01), Hoffman et al.
patent: 3961137 (1976-06-01), Hutt et al.
patent: 3962647 (1976-06-01), Richman
patent: 3967061 (1976-06-01), Dobias
patent: 3967062 (1976-06-01), Dobias
patent: 3980825 (1976-09-01), Morrien
patent: 4012697 (1977-05-01), Ballinger
patent: 4029905 (1977-06-01), Abraham

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