Digital lock detector and frequency synthesizer using the same

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S012000, C327S107000

Reexamination Certificate

active

07956658

ABSTRACT:
There is provided a digital lock detector and a frequency synthesizer using the same. The digital lock detector includes a comparator unit receiving a plurality of control bits, and generating a bit signal to notice a lock condition of the plurality of control bits; a delay cell block generating a plurality of delay signals based on the bit signal, and outputting a clock signal by combining the bit signal and the plurality of delay signals; and a detection unit detecting a shift time of the clock signal, and generating a lock indication signal according to the detection result.

REFERENCES:
patent: 5909130 (1999-06-01), Martin et al.
patent: 5978427 (1999-11-01), Kuhara
patent: 6714083 (2004-03-01), Ishibashi
patent: 6747519 (2004-06-01), Jaehne et al.
patent: 7116145 (2006-10-01), Kim et al.
patent: 2007/0285082 (2007-12-01), Kimura et al.
patent: 2008/0084233 (2008-04-01), Lee
patent: 10-2007-0061049 (2007-06-01), None
Robert Bogdan Staszewski et al., “All-Digital PLL with Ultra Fast Settling”, IEEE Transactions on Circuits and Systems-II: Express Briefs, pp. 181-185, vol. 54, No. 2, Feb. 2007.

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