Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Patent
1997-08-19
2000-07-04
Teska, Kevin J.
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
703 15, 716 4, 716 5, G06F 1750
Patent
active
06083269&
ABSTRACT:
A method of designing an integrated circuit employs hardware testing rule checking so as to ensure hardware testability and to ensure that automated test program generation will succeed when the design cycle reaches that stage. The method calls for, first, receiving a proposed logic design defined at a functional or behavioral level; second, defining a test bench for simulating operation of the logic design, the test bench including at least one input vector for stimulating the logic design for verifying the operation of the logic design; receiving a predetermined set of one or more hardware testing rules associated with a target tester; simulating operation of the logic design using the test bench; and, prior to releasing the logic design for logic synthesis, checking the simulation for compliance with the hardware testing rule set. Preliminary checking of the design and test bench prior to synthesis can avoid costly corrections later in connection with test program generation.
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Wont et al.; "Test Program Development in VLSI Testing", Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, vol. 4, pp. 2697-2700, Jun. 1997.
Graef Stefan
Phan Quang
LSI Logic Corporation
Sergent Douglas W.
Teska Kevin J.
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