Digital input buffer with glitch suppression

Details Digital input buffer with glitch suppression Digital input buffer with glitch suppression

2006-06-21

2008-07-08

Richards, N. Drew (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S268000, C327S379000, C327S552000

Reexamination Certificate

active

07397292

ABSTRACT:
A delay and deglitching circuit suppresses glitches occurring in a received digital signal while introducing a predetermined delay to the signal. The deglitching circuit comprises an RC filter and a Schmitt trigger. A node at the input of the Schmitt trigger fed by the RC filter is pulled to a high supply voltage or a low supply voltage when a glitch is removed or the input signal transitions. By setting the RC filter to initial conditions, multiple glitches can be removed with the same affectivity while reducing a sensitivity of the introduced delay to supply voltage variations.

REFERENCES:
patent: 3805178 (1974-04-01), Rollett
patent: 5341033 (1994-08-01), Koker
patent: 5479132 (1995-12-01), Verhaeghe et al.
patent: 5689200 (1997-11-01), Ting et al.
patent: 6134252 (2000-10-01), Aspacio et al.
patent: 6392474 (2002-05-01), Li et al.
patent: 6704416 (2004-03-01), Sciabica, Jr.
patent: 6778111 (2004-08-01), Zhu et al.
patent: 6958641 (2005-10-01), Lee
patent: 7224212 (2007-05-01), Tseng

Affiliated with

Also associated with

Rating

Digital input buffer with glitch suppression does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital input buffer with glitch suppression, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital input buffer with glitch suppression will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3972708