Digital information transfer system (DITS) receiver

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G06F 304

Patent

active

042989590

ABSTRACT:
A DITS receiver provides direct memory access (DMA) for a central processing unit (CPU) to the latest update value of a plurality of pre-identified signal data words stored in a DITS data RAM. The DITS stores the data received asynchronously on a plurality of input channels directly in RAM as it is received, by stripping the first byte of the data word information field which identifies the data source and using this first byte ID as an address pointer to define the location in RAM for each remaining signal bit of the data word. The DITS slices the data received on each input channel into samples of less than one bit cell duration through a common sampling network which under sequence control provides commutation of the input channel samples to ensure that dual speed input channel are each sampled at least one time within the signal speed time period. The sampled data is multiplexed into a serial data stream and steered either to a first byte address register or directly to the data RAM.

REFERENCES:
patent: 3891971 (1975-06-01), Hirvela et al.
patent: 4003032 (1977-01-01), Austin et al.

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