Digital hysteresis circuit

Details Digital hysteresis circuit Digital hysteresis circuit

1974-09-16

1976-05-25

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307208, 307269, 328155, 343 73, H03K 117, H03K 1908

Patent

active

039597300

ABSTRACT:
A digital hysteresis circuit which generates delayed, clock-synchronous output pulses from input pulses having a random timing relationship with the clock. Input pulses slewing generally in or out on a repetitive clock defined time base may back up from the direction they are slewing by a predetermined time interval without changing the time position of the clock-synchronous, time-delayed output pulses which they successively generate. The circuit is useful in reducing jitter in the read-out of a digital counter while the counter is operating by preventing a load command pulse occurring at counter transition time from effecting a read-out at that instant, and further effective in reducing jitter in the commanded read out from a digital counter where system uncertainty might otherwise cause shift of successive input commands from their normally predictable time positions.

REFERENCES:
patent: 3114109 (1963-12-01), Melas
patent: 3188484 (1965-06-01), Jorgensen
patent: 3225301 (1965-12-01), McCann
patent: 3270288 (1966-08-01), Hackett
patent: 3764920 (1973-10-01), Galcik et al.
patent: 3894246 (1975-07-01), Torgrim

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