Digital frequency synthesizer

Details Digital frequency synthesizer Digital frequency synthesizer

1985-07-08

1988-06-21

Malzahn, David H.

Boots, shoes, and leggings

328 14, H03B 1900

Patent

active

047529024

ABSTRACT:
N stages of BCD adders receive as a first addend BCD encoded information representing a desired frequency. They receive as a second addend the outputs of N stages of four-bit registers. The summing outputs of the adders are input data for the registers. The data is clocked into the register by a stable frequency source. The outputs from a plurality of the most significant stages of the registers are used to address a ROM. Using the periodically changing BCD address, a sinusoidal function is retrieved in individual samples from the ROM. Digital data from the ROM is converted to analog. A low pass filter enhances the desired frequency and suitably attenuates higher frequencies. An equalizer compensates for power roll-off.

REFERENCES:
patent: 3727037 (1973-04-01), Zorn
patent: 3735269 (1973-05-01), Jackson
patent: 3813528 (1974-05-01), Blanding
patent: 4039806 (1977-08-01), Fredriksson et al.
patent: 4410955 (1981-03-01), Burke et al.
patent: 4484296 (1984-11-01), Treise
patent: 4626787 (1986-12-01), Mefford

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