Digital frequency synthesizer

Boots – shoes – and leggings

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364701, G06F 102

Patent

active

049338900

ABSTRACT:
The edge timing of a clock-synthesized numerically controlled oscillator (NCO) waveform of a desired frequency is corrected to coincide more precisely with that of an ideal waveform of the desired frequency by providing an NCO output signal to a controllable delay line, determining from the NCO output signal an offset time of the NCO clock signal from that of the ideal waveform, and controlling delay of the delay line so that the output signal has an edge substantially coincident with the ideal waveform. Using delays which are small fractions of a system clock interval, direct digital synthesis of frequencies near the clock frequency is achieved. Preferably, the delay is performed with a tapped delay line, which may be implemented as a chain of transistors in a monolithic device. In a preferred embodiment, remaining periodic phase variations are further suppressed by randomizing the tap selection sufficiently to suppress sideband spurs. This may be accomplished by selecting two or more adjacent tap delays and using a random sequence generator to control an early/late tap selection switch. Fabrication of a gigahertz range direct digital synthesizer is described.

REFERENCES:
patent: 4410954 (1983-10-01), Wheatley et al.
patent: 4476536 (1984-10-01), Jones, Jr.
patent: 4559613 (1985-12-01), Murphy et al.
patent: 4652832 (1987-03-01), Jasper
patent: 4835721 (1989-05-01), Becker et al.

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