Digital frequency multiplier circuit including delay circuit

Details Digital frequency multiplier circuit including delay circuit Digital frequency multiplier circuit including delay circuit

1997-11-10

2000-07-11

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327119, 377 47, H03B 1900

Patent

active

060878649

ABSTRACT:
A frequency multiplier circuit device having a delay circuit including a plurality of delay elements, and a selector circuit for selecting the number of delay elements for every output stage of the delay circuit. A reference input signal and an output from the selector circuit for determining the period of the reference input signal are input to a phase comparator. The selector circuit is controlled on the basis of an output from the phase comparator to select the number of delay elements of the delay circuit, so as to generate a signal for multiplying a frequency by N, so that the signal is supplied to an exclusive NOR circuit to output a signal having a frequency an N-number of times that of the reference input signal.

REFERENCES:
patent: 4206414 (1980-06-01), Chapman
patent: 5815017 (1998-09-01), McFarland
patent: 5838179 (1998-11-01), Schmidt

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