Digital frequency multiplier

Registers – Coded record sensors – Particular sensor structure

Patent

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Details

235 92DM, 235 92CA, H03K 2130

Patent

active

043397220

ABSTRACT:
A digital frequency multiplier which includes a first counter for counting the number of clock pulses received from a generator having first been divided by N in a divider. The counter establishes the number of these pulses which occur during a cycle of the incoming frequency and this number is compared in a comparator with the count from a further clock counter. Typically when coincidence occurs a change of state of the comparator results and as this coincidence will occur N times during a cycle of the incoming frequency, the output repetition frequency from the comparator will be N times the incoming frequency. Although division can be provided prior to the first counter this can alternatively be provided after this counter by using an arithmetic divider.

REFERENCES:
patent: 3935538 (1976-01-01), Kizler
patent: 4053839 (1977-10-01), Knoedl
patent: 4086471 (1978-04-01), Takahashi

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