Digital frequency-lock circuit

Details Digital frequency-lock circuit Digital frequency-lock circuit

1978-02-15

1979-08-28

Heyman, John S.

Oscillators

Relaxation oscillators

328133, 328 44, 328 55, 331 1A, H03B 304

Patent

active

041662490

ABSTRACT:
A digital frequency-lock circuit has a binary rate multiplier connected between a fixed frequency oscillator and an output terminal to modify the oscillator output signal in accordance with a digital word. An up/down counter is arranged to supply the digital word to the rate multiplier in accordance with a count stored in the counter. The frequency of the rate multiplier output is compared with an input signal frequency during a cycle of the input signal to maintain a predetermined relationship between the compared frequencies.

REFERENCES:
patent: 3781695 (1973-12-01), Jackson
patent: 3983498 (1976-09-01), Malek
patent: 3988696 (1976-10-01), Sharpe
patent: 4019153 (1977-04-01), Cox et al.
patent: 4023116 (1977-05-01), Alfke et al.

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