Digital frequency detection circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Particular output circuit

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377106, 377 20, 328138, 307522, H03K 504

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active

051596156

ABSTRACT:
A digital frequency detection circuit, or frequency discriminator, is implemented for use as a synchronization field detector for the synchronization field frequency in the data stream read from a computer floppy disk. No analog components are utilized; and the detector produces an output indicative of the presence of a valid synchronization field frequency whenever the incoming data pulses fall within a predetermined range of frequencies having a lowest frequency limit and an upper frequency limit. This is accomplished by employing a multi-stage binary counter for counting the reference clock pulses from a computer. The counter is reset each time an incoming data pulse is received; and the outputs of the counter are coupled to coincidence gates, which establish the lowest and highest frequency limits of the predetermined range of frequencies to be detected. The outputs of the coincidence gates then are applied to inputs of a digital latch circuit, which also is responsive to the incoming data pulses for producing an output indicative of the presence or absence of input data signals within the desired range of frequencies.

REFERENCES:
patent: 4326256 (1982-04-01), Furumoto
patent: 4330751 (1982-05-01), Swain
patent: 4360782 (1982-11-01), Nowell
patent: 4390843 (1983-06-01), Betts et al.
Intel AR116, pp. 7-112 to 7-115 and 7-122, 7-123.
IEEE Journal of Solid-State Circuits, vol. 26, 1991, pp. 119-120.

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