Digital frequency control circuit phase control circuit and PLL

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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Details

327150, 327151, 327160, H03L 706, H03L 708

Patent

active

057774994

ABSTRACT:
An oscillating circuit 30 outputs a signal .o slashed..sub.o whose pulse cycle T is a linear function T=kS+m of a control input value S. A frequency control circuit 10, every time a counter 11 counts a number Nr of pulses of a reference signal .o slashed..sub.r, calculates S=No-m/k, where No is a count of .o slashed..sub.o counted by the counter 12, makes a judgement on convergence of .o slashed..sub.o based upon the difference between input and output values of a register 14, makes the register 14 hold S, updates Nr=S+m/k and clears the counter 12 to 0. A digital phase control circuit 20 judges a advance/delay of the phase of .o slashed..sub.o relative to .o slashed..sub.r with a phase comparator circuit 21, decrements/increments a count with a counter circuit 22 every time a judgement on the advance/delay of the phase is made and when the result of the judgement on the advance/delay of the phase is reversed from the previous result of that, changes the count to a value that is half the number of times that the same judgement was made successively before the reversal.

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patent: 5343169 (1994-08-01), Debaty
patent: 5382921 (1995-01-01), Estrada et al.
patent: 5399985 (1995-03-01), Awata et al.
patent: 5461345 (1995-10-01), Taki
patent: 5475718 (1995-12-01), Rosenkrnaz
patent: 5608355 (1997-03-01), Noguchi

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