Digital FM demodulator utilizing uncorrelated clock reference si

Demodulators – Frequency modulation demodulator – Input signal split into plural signals

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Details

329337, 375 82, H03D 302

Patent

active

052046354

DESCRIPTION:

BRIEF SUMMARY
FIELD OF TECHNOLOGY

This invention relates to an FM demodulator, especially to an FM demodulator which yields the modulated object signal directly in digital word string form.


BACKGROUND OF THE TECHNOLOGY

In FM demodulating circuits which follow the final section of the IF amplifiers in radio communication equipment, etc, a standard practice is to obtain the modulated object signal in the form of an analog signal, even when the communication equipment itself actually needs it in the form of digial word string, and a demodulated analog signal is obtained after it is A/D (analog-to-digital) converted after appropriate processing as necessary.
On the other hand, there has been used a pulse-counting type FM demodulator which counts the FM carrier directly by use of a counter, over a given duration. Actually, in this case, conventional digital output can be obtained directly. However, the output of the IF amplifier still preserves the narrow band nature of the signal significantly, and the object signal appears merely in a small deviation over a fixed count number over each count duration. Also resolution and data rate can not be optimized; hence, the foregoing characteristics prevent this method from being widely used.
Another method is known as the period or duration measuring method; however, due to the same reasons as above stated, this method cannot be widely used.
In order to be adequate and/or suitable, for such counter type FM demodulator circuit, the IF signal to be counted must have a very wide deviation, such as, the modulation index should exceed several percents. This can be realized only by again converting the IF signal down to a still lower frequency, which only amplifies the complexity of the total circuit of the receiver.


DISCLOSURE OF THE INVENTION

This invention aims to solve the redundancy and/or difficulty of the above mentioned methods. A frequency dependent phase difference generating circuit is followed by a phase comparator circuit. Instead of producing the demodulated output in an analog signal, as in the prior art, by means of averaging the binary output of the phase comparator, in the invention, the binary output is quantized in time domain by predetermined fixed rate clock signals, without averaging at all. The resultant time domain quantized binary signal in pulse density modulation form is converted to a signal in a parallel digital word string form by a counter or a decimation filter, to obtain an object signal directly in a digital word string form. The advantages of the direct digital demodulator are the reduction of parts and cost by virtue of the reduction of processing steps, the reduction fo saize, nd enabcement reduction of processing steps, the reduction of size, and enhancement of reliability. Furthermore, non-linearity distortion, offset, gain variation, noise contamination, all of which arises from analog parts and circuits can be avoided, because, in the invention, the object signal is not passed at all through any analog stages.


EXPLANATION OF THE FIGURE

The sole FIGURE is an exemplary block diagram of a preferred embodiment of the invention. The members are given below. difference generating circuit.


EXPLANATION OF A PREFERRED EMBODIMENT

The embodiment essentially is an FM demodulator comprising
a frequency-dependent phase difference generating means, such as a quadrature tank circuit, delay line, injection lock oscillator, phase lock loop (PLL), etc, to which the input FM signal to be demodulated is supplied;
a phase comparator means which compares the phases of the signals, one passing through the frequency dependent phase difference generating means and the other coming directly; means for generating a binary, unaveraged, pulse width modulated signal from the output of the phase comparator means;
a time domain quantization means for generating a pulse density modulated binary signal by means of clocking the pulse width modulated signal by use of a reference clock signal; and
a counter or decimation filter means for counting or low pass filtering the

REFERENCES:
patent: 4476435 (1984-10-01), Chang et al.

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