Digital filter with integrated decimation

Details Digital filter with integrated decimation Digital filter with integrated decimation

1989-02-24

1990-11-20

Shaw, Dale M.

Boots, shoes, and leggings

G06F 1531

Patent

active

049723570

ABSTRACT:
A digital filter with integrated decimation shapes a sampled signal and reduces its sampling rate. The filter includes, in cascade, a prefilter (5), a decimator stage (8) and an equalizer (9). The prefilter is a simplified FIR filter in which only logical operations are performed; all multi-digit multiplications are performed only in the equalizer, at the reduced sampling rate. This results in a filter having increased throughput and/or occupying a reduced area.

REFERENCES:
patent: 4472785 (1984-09-01), Kasuga
patent: 4766562 (1988-08-01), Vary
Adams et al; "A New Approach to FIR Digital Filters with Fewer Multipliers and Reduced Sensitivity"; IEEE Trans Circuits & Systems v. CAS-30 (May '83), pp. 277-283.
"On Party Digital Anti-Aliasing Filters", H. W. Schussler et al, 1982.
"Design of Linear-Phase Partly Digital Anti-Aliasing Filters", T. Saramaki et al, 1985, IEEE.
"On Multistage Finite Impulse Response (FIR) Filters With Decimation", R. Shively, IEEE, vol. ASSP-23, No. 4, Aug. 1975.
"A Class Of Linear-Phase FIR Filters For Decimation, Interpolation, and Narrow-Band Filtering", 8084 IEEE, ASSP-32, 1984, Oct., No. 5, New York.

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