Digital filter with efficient quantization circuitry

Details Digital filter with efficient quantization circuitry Digital filter with efficient quantization circuitry

2000-05-11

2004-01-13

Mai, Tan V. (Department: 2124)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S320000

Reexamination Certificate

active

06678709

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable.
BACKGROUND OF THE INVENTION
This invention is in the field of digital filters, and is more specifically directed to quantization techniques, particularly in infinite impulse response (IIR) digital filters.
As is well known in the art, digital signal processing is now commonly used in many electronic systems, over a wide range of applications. Digital signal processing techniques are now particularly commonplace in telecommunication applications such as wireless telephones, data communications by way of modems and the like, and other facets of this field. Digital signal processing is also utilized in video and audio signal processing, such as used in image recognition, image processing, data compression, digital audio and digital video recording and playback, and the like.
A fundamental building block in the field of digital signal processing is the digital filter. As is elementary in this field, digital filters refer to the filtering of sampled-data, or discrete-time, signals, which are typically digital representations of analog signals which have been generated by way of analog-to-digital conversion. Fundamentally, a digital filter is a computational process, carried out either through dedicated hardware or through the execution of a sequence of instructions by programmable logic, by way of which an input sequence of numbers is converted into an output sequence of numbers, modified by a transfer function. Typical transfer functions refer to the frequency characteristics of the filter; analogously to analog filter counterparts, examples of digital filter transfer functions include low-pass, high-pass, band-pass, etc. Digital filter computations typically include digital addition, digital multiplication of signal values by constants, and the insertion of delay stages.
As is also well known in the art, digital filters are often classified according to their impulse response. Finite impulse response (FIR) digital filters refer to the class of filters in which only a finite number of input samples affect the generation of a given output sample; typically, FIR digital filters perform computations upon a finite number of input samples (i.e., the current sample, and a selected number of preceding input samples), in a non-recursive fashion. Infinite impulse response (IIR) digital filters are a class of filters in which previous output samples are also used in generating a current output sample, and are thus typically realized in a recursive fashion, including feedback of output sample values. Because of the feedback of prior output values, each current output value of an IIR filter depends upon the value of an infinite series of input sample values, hence the term “infinite impulse response”.
As noted above, digital filter realizations generally include multiplication operations, specifically the multiplication of a sampled-data value by a constant value (i.e., a coefficient). According to conventional implementation, a binary multiply of an p-bit digital word by an q-bit digital word will result in a product that occupies p+q-bits. Typically, digital filters operate upon input and output sample values of the same resolution, expressed by the same number of bits in the digital words representing these values. Accordingly, the higher precision data words resulting from the multiply operation are typically truncated, or quantized, to the lower-order of the output sample value. Various types of quantization are known in the art, including simple truncation of lower-order bits, rounding, and magnitude truncation (as will be described in further detail below). In the above example, if p-bits are used to represent the input and output sample values, and if q-bit coefficients are utilized, the p+q-bit multiplication results will be quantized to an p-bit data word.
Quantization necessarily inserts error into the digital filter process, as the resulting quantized value is of less precision that the pre-quantization product. The resulting quantization error is of particular concern in the feedback paths of IIR filters, as will now be described relative to
FIGS. 1
a
and
1
b
.
FIG. 1
a
illustrates the recursive (feedback) portion of a simple first-order IIR filter
2
, realized by adder
3
, delay stage
4
, and multiplier
5
. Adder
3
receives the current input value x
n
and the output of multiplier
5
at its inputs, and generates output value y
n
at its output. Output value y
n
is also applied to delay stage
4
, for use in connection with the next sample. The output of delay stage
4
corresponds to output value y
n−1
, since delay stage
4
incorporates a delay of one sample period. The output of delay stage
4
is multiplied by coefficient value a, in multiplier
5
, and the product applied to adder
3
as noted above. This operation of filter
2
may therefore be defined as:
y
n
=x
n
+a·y
n−1
where the nth output sample y
n
corresponds to the sum of the current input sample x
n
with the product of the value of coefficient a times the prior output sample y
n−1
. This simple first order filter thus has the z-domain transfer function H(z):
H
⁡
(
z
)
=
1
1
-
az
-
1
where z
−1
, is the z-domain delay operator. Filter
2
of
FIG. 1
a
thus has a single pole, at z=a, requiring coefficient a to have an absolute value less than or equal to unity for stability.
As noted above, however, for an p-bit input value x (and output value y), and assuming an q-bit coefficient a, the output of multiplier
5
will be an p+q-bit value. As such, some degree (specifically, q-bits) of quantization is necessary to generate the p-bit output sample value y.
FIG. 1
b
illustrates digital filter
2
′, which is constructed similarly as filter
2
in
FIG. 1
a
, but which also includes quantizer
6
disposed at the output of multiplier
5
, prior to adder
3
. As shown in
FIG. 1
b
, multiplier
5
generates an p+q-bit product output that is quantized by quantizer
6
into an p-bit digital word prior to application to adder
3
. Filter
2
′ thus generates an p-bit output value y
n
for each input sample value x
n
. The operation of filter
2
′ of
FIG. 1
b
can thus be expressed as:
y
n
=x
n
+Q[a·y
n−1
]
where Q refers to the quantization operation of quantizer
6
.
A well-known problem in IIR digital filters is referred to as “limit cycles”. The limit cycle problem is manifest in digital filters that generate an oscillating output signal in response to a constant or zero-level input. In this regard,
FIGS. 1
a
and
1
b
include only the recursive portions of filters
2
,
2
′, because limit cycles are caused only by the recursive feedback loops, as is known in the art. It will be understood that the non-recursive (feed-forward) portion of the filters will be implemented in cascade with the recursive portions shown in
FIGS. 1
a
,
1
b
. Referring to
FIG. 1
b
, an example of the generation of limit cycles responsive to a zero-level input will now be described, in the case where x
n
=0 for all n, where a=−½, and where y
−1
=7. As noted above, filter
2
′ of
FIG. 1
b
realizes the expression of y
n
=x
n
+Q[a·y
n−1
]. In this example, assume that the quantization function Q is a simple rounding function Q
R
. As a result, and considering that x
n
=0 for all n, filter
2
′ thus may be expressed as:
y
n
=
Q
R
⁡
[
-
 
⁢
1
2
⁢
y
n
-
1
]
Beginning with sample n=−1, one may thus tabulate the values of y
n
as follows:
y
−1
=7
y
0
=Q
R
[−½(7)]=
Q
R
[−3.5]=−4
y
1
=Q
R
[−½(−4)]=
Q
R
[2.0]=+2
y
2
=Q
R
[−½(2)]=
Q
R
[−1.0]=−1
y
3
=Q
R
[

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