Digital filter overflow sensor

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364745, 333168, G06F 738, H03H 728

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045077258

ABSTRACT:
A sampled data FIR filter of the type including alternately connected ADDER circuits and delay stages in a serial chain where input samples are multiplied by coefficients and applied in parallel to the ADDER circuits for addition to partial sums therein has respective COUNTER circuits coupled to each ADDER circuit to respond to sum overflows. The COUNTER circuits are serially connected one to another by delay stages. The overflow count corresponding to each signal sample is translated to successive counter in consonance with such partial sum being translated from ADDER circuit to ADDER circuit. The last COUNTER circuit contains the net number of overflows corresponding to the output sum, which overflow signal is indicative of the state of correctness of the output sample.

REFERENCES:
patent: 3665171 (1972-05-01), Morrow
patent: 3725687 (1973-04-01), Heightley
patent: 3749895 (1973-07-01), Kao
patent: 4215415 (1980-07-01), Kanemasa et al.
patent: 4223389 (1980-09-01), Amada et al.
patent: 4305133 (1981-12-01), Amada et al.
patent: 4379338 (1983-04-01), Nishitani et al.
S. L. Freeny, "Special Purpose Hardware for Digital Filtering" Proc. of IEEE, vol. 63, No. 4, Apr. 1975, pp. 633-648.
L. B. Jackson et al., "An Approach to the Implementation of Digital Filters," IEEE Trans. Audio Electroacoust., vol. AU-16, pp. 413-421, Sep. 1968.

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