Pulse or digital communications – Equalizers – Automatic
Reexamination Certificate
2000-07-24
2004-05-18
Chin, Stephen (Department: 2634)
Pulse or digital communications
Equalizers
Automatic
C375S236000, C375S219000, C375S354000
Reexamination Certificate
active
06738420
ABSTRACT:
TECHNICAL FIELD
The present invention is directed to digital filters and, more particularly, to a digital filter having an upsampler operational at a fractional clock rate.
BACKGROUND ART
Communication systems such as, for example, time-division multiple-access (TDMA) or code-division multiple-access (CDMA) systems, typically include a mobile unit and infrastructure. The mobile unit, which is typically referred to as a handset, a mobile phone, a portable phone, a car phone, a cellular phone or the like, and the infrastructure exchange information to provide voice and/or data communications therebetween. Such information may be in the form of digital information such as bits or bytes. Accordingly, both the mobile unit and the infrastructure include both a transmit path for sending information and a receive path for receiving information. Such receive and transmit paths include various signal processing, reception and transmission hardware. In digital communication systems, it is common for both the transmit and receive paths of the mobile unit of the infrastructure to include one or more digital filters.
Referring now to
FIG. 1
, a known transmit path
10
, such as may be used in a mobile unit of a digital communications system, include a data source
12
, an upsampler and filter
16
and a clock generator (or clock)
18
. The data source
12
may be a voice coder or any other suitable hardware and/or hardware and software combination that generates a digital signal, or data stream that may include one or more bits. In the transmit path
10
of the mobile unit, the data source may include a number of functions. For example, the data source
12
may include a microphone into which the user speaks, a voice coder for processing the signal from the microphone into a digital signal and a CDMA spreader, which applies a pseudo-random number (PN) code to the output of the CDMA spreader.
The digital signal from the data source
12
has an associated data bit frequency, which may also be referred to as a bit rate, generally referred t hereinafter as f. In some applications, f may be a frequency such as 1.2288 megahertz (MHz). The digital signal is coupled to the upsampler and filter
16
, which upsamples and filters the digital signal in a known manner described in conjunction with FIG.
2
. After the digital signal is upsampled and filtered, it may be coupled from the upsampler and filter
16
to a mixer
20
, which may also be referred to as an upconverter. The mixer
20
also receives a signal from an oscillator
22
and, using the oscillator signal, upconverts the upsampled digital signal to a frequency that is appropriate for transmission by an antenna
24
.
Commonly, the clock
18
operates at a frequency that is an integral multiple of the data bit frequency (f). Accordingly, the clock frequency may be referred to as having a frequency of Nf, wherein N is an integer. When the upsampler and filter
16
receives a clock signal having a frequency equivalent to Nf, the upsampler and filter
16
operates in a known manner to produce an upsampled bit stream having a frequency of Nf However, in instances when the clock frequency is not an integral multiple of the frequency of the digital signal from the data source
12
, a frequency compensator
26
is typically used. In particular, as shown in
FIG. 1
, if the clock frequency is (A/B)Nf, and (A/B) is a coefficient representing an undesired component of the clock frequency, the frequency compensator will typically remove B minus A clock cycles once every B cycles to generate a resultant frequency approximating an integer multiple of f (e.g., Nf). The inaccuracy between the resultant frequency approximating an integral multiple of f and the actual integral multiple of f is referred to hereinafter as clock jitter.
Turning now to
FIG. 2
, the upsampler and filter
16
includes a number of delay blocks
30
,
32
,
34
and a number of coefficient generators
36
,
38
,
40
,
42
, which are labeled as &agr;
1
-&agr;
4
, respectively. Each of the coefficient generators
36
,
38
,
40
42
is driven by the signal from the frequency compensator
26
and produces a different coefficient on each clock cycle output by the frequency compensator
26
. Because the coefficient generators
36
,
38
,
40
,
42
receive a signal from the frequency compensator
26
having a frequency of approximately Nf (due to the removal of one or more clock cycles), each coefficient generator produces N coefficients for each bit in the digital signal. The coefficient generators
36
,
38
,
40
,
42
are coupled to multipliers
44
,
46
,
48
,
50
, which multiply the portions of the coded bit stream by the coefficients produced by the coefficient generators
36
,
38
,
40
,
42
. An adder
52
is coupled to each multiplier
44
,
46
,
48
,
50
and sums the products of the multipliers
44
,
46
,
48
,
50
together to produce the upsampled bit stream that is the filter output. Accordingly, the output of the adder
52
is an upsampled bit stream having a frequency of Nf.
There are, however, shortcomings associated with using a frequency compensator
26
. For example, an oscillator having a frequency of 19.68 MHz may be the closest oscillator to an integral multiple of 1.2288 MHz, even though 19.68*(1024/1025)=16*1.2288 (i.e., the available 19.68 MHz oscillator is off by a factor of 1024/1025 from being an integral multiple of 1.2288 MHz). In such a situation, the known technique, employed by the frequency compensator
26
, of generating an integral multiple of the digital signal frequency by removing one clock pulse out of every 1025 clock pulses of the 19.68 MHz oscillator may not produce an upsampler and filter output having an accurate representation of a signal having an exact clock frequency, due to jitter in the clock signal. The maximum clock jitter in such an arrangement may be +/−6.24%. Accordingly, removing one or more clock pulses by the frequency compensator
26
causes the frequency spectrum of the output signal from the upsampler and filter
16
to be spread due to the clock jitter.
SUMMARY OF THE INVENTION
The invention disclosed herein allows an oscillator having an output signal that is not an integral multiple of a data bit frequency to be used by an upsampler and filter, while reducing the inaccuracies in the time and frequency domains of the upsampler and filter output that are typically associated with an upsampler and filter using a frequency that is not an integral multiple of the data bit frequency.
In one aspect, the present invention may be embodied in a filter for use in a digital communication system having a data source producing a data stream having a first frequency, a first portion and a second portion. The digital communication system may further include a clock generator producing a signal having a second frequency that is equivalent to the first frequency multiplied by a desired coefficient and multiplied by an undesired coefficient. In such an arrangement the filter may include a first cycle counter communicatively coupled to the clock generator and producing a first periodic counting pattern having a number of states sequentially advanced by the clock generator, wherein the first cycle counter alters the first periodic counting pattern based on the undesired coefficient, a first coefficient table communicatively coupled to the first cycle counter and producing coefficients corresponding to the first periodic counting pattern and a first multiplier communicatively coupled to the first coefficient table and multiplying the first portion and the coefficients corresponding to the first periodic counting pattern to produce a first product signal. Additionally, the filter may include a second cycle counter communicatively coupled to the clock generator and producing a second periodic counting pattern having a number of states sequentially advanced by the clock generator, wherein the second cycle counter alters the second periodic counting pattern based on the undesired coefficient, a second coefficient table comm
Chin Stephen
Grossman & Flight LLC
PrairieComm, Inc.
Vartanian Harry
LandOfFree
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