Digital filter and digital broadcasting receiver having the...

Details Digital filter and digital broadcasting receiver having the... Digital filter and digital broadcasting receiver having the...

2005-01-06

2009-06-23

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07552158

ABSTRACT:
The present invention relates to a digital filter capable of computing a tap without output delay due to the filter operation in a symbol time, and a digital broadcasting receiver having the same. Particularly, filter output is obtained within a clock period, one multiplier and one adder are used to perform coefficient update for a plurality of taps, and the multiplier performs the output operation for each tap, whereby the number of multipliers and adders is reduced inversely proportional to the number of taps being operated for one clock period. Thus, the digital filter of the present invention can be very advantageously used for resolving the filter size problem in multi-tap filters.

REFERENCES:
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patent: 5907497 (1999-05-01), Raghunath
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patent: 6665696 (2003-12-01), Brokish
patent: 7408983 (2008-08-01), Kim
patent: 2005/0050127 (2005-03-01), Kim

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