Digital filter

Details Digital filter Digital filter

1995-09-05

1998-02-10

Ghebretinsae, Temesghen

Pulse or digital communications

Receivers

Interference or noise reduction

36472401, 36472417, H04B 110

Patent

active

057177260

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The invention relates to a digital filter which can be switched over between a first characteristic and a second characteristic, it being possible to supply signals which are to be filtered from an input via an adder to an output, and it being possible for the signals at the output to be fed back via a delay element to the adder.
The operation of filters can be considerably adversely affected by brief interference with the signals which are to be filtered. Thus, for example, low-pass filters have been proposed in broadcast radio receivers in order to derive a signal which represents the received field strength, for example in the German Patent Application P 43 09 518.6 from the applicant. Furthermore, broadcast radio receivers have been disclosed in which it is possible to switch over very quickly from one received frequency to another. This is necessary in particular for testing the capability to receive so-called alternative frequencies. In this case, it is once again important to obtain, as quickly as possible after switching over, a signal which represents the received field strength.


SUMMARY OF THE INVENTION

It is thus the object of the present invention to specify a digital filter which can be switched over between a first characteristic and a second characteristic and, after switching over from the second characteristic to the first characteristic, carries out the filtering of the supplied signal as far as possible without any transient process. The first characteristic can correspond to, for example, a low-pass filter.
This object is achieved according to the invention in that a first multiplier is arranged between the input and a first input of the adder, and a second multiplier is arranged between the delay element and a second input of the adder, and in that a first coefficient can be supplied to the first multiplier and a second coefficient can be supplied to the second multiplier, which coefficients can in each case be switched over, in the case of the second characteristic the second coefficient being zero and the first coefficient being equal to the quotient of the first coefficient in the case of the first characteristic and the difference between 1 and the second coefficient in the case of the first characteristic.
The filter according to the invention has the advantage that the delay element is already loaded, when the first filter characteristic is switched on, with the sample which is to be used for feedback. The second characteristic can correspond, for example, to an all-pass filter. A constant level of transmission of the low frequencies is achieved in the case of the digital filter according to the invention in that, in the case of the second characteristic, the first coefficient is equal to the quotient of the first coefficient in the case of the first characteristic and the difference between 1 and the second coefficient in the case of the first characteristic.
A large number of digital components and assemblies are available for implementation of the filter according to the invention. Their accuracy is frequently limited, for example to 16 binary digits at inputs of multipliers and in the case of memory modules. In order nevertheless to be able to operate in other circuit parts with signals having a greater quantization accuracy, in a preferred embodiment of the invention the output signals of the adder are split into more highly significant binary digits and less significant binary digits, and that the more highly significant and the less significant binary digits on the one hand and the second coefficient on the other hand are supplied to in each case one second multiplier, whose output signals are passed via a further adder to the adder. In the case of this embodiment, processing of the less significant binary digits can be carried out in such a manner that the less significant binary digits are shifted in the direction of the more highly significant binary digits before being supplied to the delay element, and in such a manner that the output s

REFERENCES:
patent: 4779128 (1988-10-01), Johannes et al.
patent: 4809207 (1989-02-01), Nillesen

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