Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2011-07-12
2011-07-12
Chang, Joseph (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C331S00100A, C331S025000, C327S156000, C327S159000
Reexamination Certificate
active
07978014
ABSTRACT:
A digital PLL frequency synthesizer characterized by fast-locking and low-jitters is presented. The PLL comprises a phase detector, a controllable oscillator, a loop filter having an automatically-adjusted loop gain, a feedback phase integration circuit, and a reference phase integration circuit. Fast-locking is achieved by dynamically adjusting forward-path gain and integral-path gain according to the output of the phase detector and the output of the integral-path during phase tracking. A skew-compensated counter circuit is proposed, which incorporates an asynchronous counter, a data register and a sample phase generator and features high-speed and low-power operation.
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In-Chul Hwang, Sang-Hun Song, Soo-Won Kim; A Digitally Controlled Phase-Locked Loop With a Digital Phase-Frequency Detector for Fast Acquisition; IEEE Journal of Solid-State Circuits, vol. 36, No. 10, Oct. 2001; p. 1574-1581.
Chen Wei-Zen
Yang Song-Yu
Chang Joseph
King Justin
National Chiao Tung University
Shin Jeffrey
WPAT, PC
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