Digital error corrected fractional-N synthesizer and method

Details Digital error corrected fractional-N synthesizer and method Digital error corrected fractional-N synthesizer and method

1992-02-27

1993-10-26

Ng, Jin F.

Oscillators

Relaxation oscillators

331 1A, H03B 1900, H03L 700

Patent

active

052569810

ABSTRACT:
A digital error corrected Fractional-N synthesizer having a reference frequency generator for providing a reference frequency signal and a voltage controlled oscillator for providing an output signal having a frequency equal to a fractional multiple of said reference frequency signal. The output signal of the Fractional-N synthesizer includes a residual error signal. An error signal compensation circuit is provided for generating a correction signal to cancel the residual error signal. In a preferred embodiment, the reference frequency signal is delivered to a loop phase detector which provides an error voltage proportional to a phase difference between the reference frequency signal and a feedback signal. The frequency of the output signal, which is a fractional multiple of the reference frequency signal and proportional to the error voltage, is operated upon by a plurality of divisors of a loop divider circuit to provide the feedback signal. The residual error signal appears at an output terminal of the loop phase detector. The error signal compensation circuit, which includes a binary counter and a magnitude comparator, generates the correction signal to cancel the residual error signal. A summing node is provided for canceling the residual error signal. The resistors of a summing network are scaled so that the total energy in the correction signal is equal to the total energy in the residual error signal.

REFERENCES:
patent: 4516083 (1985-05-01), Turney
patent: 4562410 (1985-12-01), O'Rourke
patent: 4980652 (1990-12-01), Tarusawa et al.
patent: 5045813 (1991-09-01), Yamashita et al.
patent: 5093632 (1992-03-01), Hietala et al.
patent: 5128632 (1992-07-01), Erhart et al.

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