Pulse or digital communications – Repeaters – Testing
Patent
1980-02-28
1982-03-23
Safourek, Benedict V.
Pulse or digital communications
Repeaters
Testing
328165, 328167, 333 18, 333 28R, 375 99, 375101, 455295, 455296, H04B 110
Patent
active
043217052
ABSTRACT:
The invention is used in a receiver for a communication system, which transmits periodically occurring digital signals over a pair of orthogonally related polarized waves. Horizontal signals from one of the orthogonal waves are applied to a first input terminal of an equalizer in the receiver. Vertical signals from the other of the orthogonal waves are applied to a second input terminal. An individually associated, cascaded plurality of delay circuits is coupled to each of the input terminals. The delay in each of the delay circuits is equal to the time spacing between the occurring signals. Therefore, a plurality of the recurring digital signals appear simultaneously at the outputs of each of the delay circuits. A variable attenuator, individually associated with the output of each delay circuit, is adjusted to pass an incremental signal responsive to each of the occurring signals appearing simultaneously at the outputs of the delay circuits. These incremental signals are added to produce a first full signal when all of the digital signals received at one of the input terminals appear simultaneously at the outputs of the delay circuits associated therewith. The adder also adds the incremental signals to produce a second full signal when all of the digital signals received at the other of the input terminals appear simultaneously at the outputs of the delay circuits associated therewith. The polarity of the second full signal is opposite to the polarity of the first full signal. Therefore, the second full signal is subtracted from that part of the first full signal which appears simultaneously with the second full signal. This subtracted signal is the interference in the first signal which occurs responsive to the second signal. Therefore, only the signal applied to one input terminal appears at the output of the adder.
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Chin Stephen
Nippon Electronics Co., Ltd.
Safourek Benedict V.
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