Digital encoder and digital-to-analog converter using same

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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C341S143000, C341S155000

Reexamination Certificate

active

07123178

ABSTRACT:
A digital encoder having a dynamic element matching (DEM) processor is divided into a master DEM circuit and N slave DEM circuits. The master DEM circuit encodes a multibit digital input signal (IN0) into parallel codes (C1) corresponding to the coefficient of a plurality of output nodes on the basis of a prescribed DEM algorithm. Each of the N slave DEM means (2) has 3 or more output nodes. Code (C1) from the master DEM circuit is encoded into parallel codes (C2) with the same weighting for each code and corresponding to the configuration of the 3 or more output nodes on the basis of a prescribed DEM algorithm, and the obtained parallel codes are output in parallel from 3 or more output nodes.

REFERENCES:
patent: 5684482 (1997-11-01), Galton
patent: 6531973 (2003-03-01), Brooks et al.
patent: 6535155 (2003-03-01), Ruha et al.
patent: 6614377 (2003-09-01), Adams et al.
patent: 6628218 (2003-09-01), Brooks et al.
patent: 6771199 (2004-08-01), Brooks et al.
patent: 6867721 (2005-03-01), Lin

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