1977-03-11
1979-05-08
Schaefer, Robert K.
58 575, 58 16D, 58 19C, G04C 2116
Patent
active
041528875
ABSTRACT:
A digital alarm timepiece comprising an oscillator circuit for generating a standard time signal, a frequency dividing circuit, time counting circuits for counting output signals of the dividing circuit to provide a time signal, alarm time memory counting circuits for setting a selected alarm time, display means for selectively displaying the time signal and the set alarm time, alarm sound generating means and a coincidence circuit for activating the alarm sound generating means upon occurrence of coincidence between the set time of the alarm and the time signal has circuit means including manually operable switch means for amending the count of the time counting ciruits, to correct the time signal and for amending the count of the alarm time memory counting circuits to set a selected alarm time and means for activating the alarm sound generating means whenever the switch means is operated to amend the count of one or another of the counting means.
REFERENCES:
patent: 3938317 (1976-02-01), Spano
patent: 3946549 (1976-03-01), Cake
patent: 4044544 (1977-08-01), Yagi
Adams Bruce L.
Burns Robert E.
Kabushiki Kaisha Daini Seikosha
Lobato Emmanuel J.
Pojunas Leonard W.
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