Digital echo suppressor

Patent

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Details

1791706, H04B 320

Patent

active

040888517

ABSTRACT:
A multi-channel digital echo suppressor wherein analog signals on a plurality of paired transmit and receive lines are sampled and digitized to form an interleaved sequence of parallel digital words. The interleaved digital words are accumulated for a predetermined period to form accumulated sample sums in sequence for each of the respective transmit and receive lines. Means are provided for segregating the receive channel accumulated samples from the transmit channel accumulated samples and bringing the samples for the respective channel pairs back into time correlation. The receive line accumulated samples are sequentially compared against a predetermined reference for producing suppression control signals which are routed to respective suppression controllers for the various channels. At the same time, the transmit line accumulated samples are compared against the time correlated receive line accumulated samples and to a predetermined reference to produce break-in control signals for each channel in sequence. The break-in control signals are monitored by a moving window scanner which selects and monitors the most recent eight break-in control signals for each channel in sequence and produces break-in operating signals when a majority of the samples in the window dictate break-in for that channel. The sequential break-in operating signals are distributed to break-in and receive pad controllers associated with the respective channels.

REFERENCES:
patent: 3562448 (1971-02-01), May, Jr.
patent: 3673355 (1972-06-01), La Marche et al.
patent: 3823275 (1974-07-01), La Marche et al.
patent: 3937907 (1976-02-01), Campanella et al.
patent: 4051332 (1977-09-01), Izumi et al.

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